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DS25LV02: Low-Voltage 1024-Bit EPROM
Table 3. EPROM Memory and Status Function Commands
COMMAND
Read Memory
Read Data/Generate CRC
Write Memory
Read Status
Write Status
HEX
F0
C3
0F
AA
55
FUNCTION
Read data from the lower 1024 bits of the 1024-bit EPROM Memory
data field. Generates a CRC value if a read continues through the
end of the last page.
Read data from the lower 1024 bits of the 1024-bit EPROM Memory
data field. Generates a CRC value of the data if read continues
through the end of the page.
Write data to the EPROM data field.
Read data from the 8-byte EPROM status field. Generates a CRC if
read continues through the end of the field.
Write the Page Protection bits and Page Redirection bytes in the
EPROM status field.
Note : The Write Memory, Read Memory, Read Data/Generate CRC, Write Status, and Read Status commands
filter the target address (TA2:TA1) value with a 007Fh AND mask that limits the addressable size of the EPROM
data field and EPROM status field to 1024 bits. Target address values equal to or greater than 0080h (128 decimal)
return data from the lower 128 bytes of the respective data field. The result of the filtering is that the internal
address wraps around every 128 bytes as the external target address increments in multiples of 128. For instance,
each time a read operation crosses a 128-byte boundary (0080h, 0100h, … FF00h, FF80h) data retrieval begins
again at address 0000h. This process repeats until reading occurs through the end of the 64kb memory space
addressable by T15:T0. It is also important to note that the filter is applied prior to calculation of the CRC, so that
target address values that are multiples of 128 return the same CRC. The CRC values should be considered
correct only for T15:T0 in the range of 0000h to 007Fh.
1-Wire BUS SYSTEM
The 1-Wire bus is a system that has a single bus master and one or more slaves. A multidrop bus is a 1-Wire bus
with multiple slaves, while a single-drop bus has only one slave device. In all instances, the DS25LV02 is a slave
device. The bus master is typically a microprocessor in the host system. The discussion of this bus system consists
of five topics: 64-bit net address, CRC generation, hardware configuration, transaction sequence, and 1-Wire
signaling.
64-BIT NET ADDRESS (ROM ID)
Each DS25LV02 has a unique, factory-programmed 1-Wire Net Address that is 64 bits in length. The term Net
Address is synonymous with the ROM ID or ROM Code terms used in the DS2502 and older Dallas 1-Wire
documentation. The first 8 bits of the Net Address are the 1-Wire family code (09h for the standard DS25LV02).
The next 48 bits are a unique serial number. The last 8 bits are a cyclic redundancy check (CRC) of the first 56 bits
(see Figure 2). The 64-bit net address and the 1-Wire I/O circuitry built into the device enable the DS25LV02 to
communicate through the 1-Wire protocol detailed in this data sheet.
Figure 2. 1-Wire Net Address Format
8-BIT CRC
MSb
48-BIT SERIAL NUMBER
8 of 17
8-BIT FAMILY
CODE (09H)
LSb
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